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  Check out the site of our research group - Low Power VLSI Research Group @ IIT Kharagpur
 
   

Custom Instruction based Implementation of Biomedical Application Using Soft Processors

A Discrete Wavelet Transformation based ECG processing algorithm has been implemented using Altera’s NIOS II soft processor. This implementation is being used as a case study to develop methodologies for energy optimization using custom instruction extensions and micro-architecture reconfiguration of the soft processor.

Duration: October 2006 to Present
Supervisor: Prof Ajit Pal, Department of Computer Science & Engineering (IIT Kharagpur)


Power Modeling Approach for Dynamic Power Estimation

The intent of the work was to develop a new power modeling approach to estimate dynamic power at Thermal Design Power (TDP) conditions for the Memory Controller Hub (MCH) of mobile platforms.

Duration: May to October 2006
Supervisor: Mr Vishvanathan L. Nenmeli, Engineering Manager (Mobile Chipset Design)
                 Intel India Technology (P) Ltd., Bangalore


Electrocardiogram (ECG) Acquisition, Processing & Monitoring System

In this project, we had designed and implemented a prototype for a hand-held 12-lead ECG signal acquisition, processing and monitoring system. It can be used to acquire ECG signal from the patient and display it on a graphical LCD. The signal is analyzed to delineate PQ, QRS and ST complexes and derive parameters like heart beat rate and PR, PQ and QT intervals.

Our motivation for the project is to develop a low-cost, easy-to-use system that can be used with little training by healthcare personnel at places where adequate medical/ treatment facilities are not available. Our project is being sponsored by MHRD under their initiative to promote and implement Telemedicine in India.

Duration: July 2004 to April 2006
Supervisors:

Sponsoring Agency: Ministry of Human Resource Development, Government of India


Lift Controller Design

A micro-programmed lift controller was designed for a 4 storied building.

Course: Architectural Design of IC
Duration: November 2005
Supervisor: Prof. A. S. Dhar, Dept. of Electronics and Electrical Communication Engineering


Area and Power Comparison of a Circuit Implemented using Different Architectures

A 4-bit unsigned fixed point array multiplier was implemented using normal, parallel, pipelined and parallel-pipelined architectures and their area and power was compared.

Course: Low Power Circuits and Systems
Duration: April 2005
Supervisor: Prof Ajit Pal, Department of Computer Science & Engineering (IIT Kharagpur)


Designing and Implementation of Microcontroller and ASIC based System for Telemedicine Application

A microcontroller based ECG Signal Acquisition & Monitoring system was implemented. This system acquires ECG signal from a standard 12 lead analog ECG machine. The acquired signal is displayed on an oscilloscope for local monitoring purpose. The data can be transmitted to a local computer only through serial port.

Duration: January to May 2004
Supervisor: Prof Ajit Pal, Department of Computer Science & Engineering (IIT Kharagpur)


Designing with 8 and 16 bit Microcontrollers

Completed the following projects while undergoing summer training at CEDTI, Calicut:

  • 8 bit digital calculator using 8 bit microcontroller
  • A real time data acquisition and control system using 16 bit microcontroller
  • A stepper motor control system using 16 bit microcontroller

Duration: June to July 2003
Supervisor: Mr. K. M. Martin, Principal Design Engineer, Embedded Systems Group, CEDTI (Calicut)


Payroll Software for Tea Gardens

Developed a payroll software for Lekhapani Tea Co. Pvt. Ltd., Longtong 3rd Mile, PO: Udaypur, Dist: Tinsukia 786171 Assam (India) and its sister concerns using MS Visual Basic 6.0 and MS SQL Server 7.0.

Duration: August to November 2003
Supervisor: Mr. Jyoti Prakash Singh, Lecturer, Dept. of Computer Engineering (SMIT)


Fingerprint Verification Software

This software was developed in C++ using introductory concepts of Digital Image Processing. The software was adjudged 3rd in an Intra College Software Competition held at Sikkim Manipal Institute of Technology.

Duration: February to April 2002

 

 
   
       
 
For questions & comments please mail to: prashant_agrawal@ieee.org
Page last updated on December 7, 2006